The Journal of Instruction-Level Parallelism

Volume 3

2001

ISSN 1942-9525

• Guest Editors' Introduction
  Mike Schlansker and Chris J. Newburn
  October, 2001
  HTML

• Squash Reuse via a Simplified Implementation of Register Integration
  Amir Roth and Gurindar S. Sohi
  October, 2001
  PDF

• Breaking Address Mapping Symmetry at Multi-levels of Memory Heirarchy to Reduce DRAM Row-buffer Conflicts
  Zhao Zhang, Zhichun Zhu and Xiaodong Zhang
  October, 2001
  PDF

• Improving Bandwidth Utilization using Eager Writeback
  Hsien-Hsin Lee, Gary Tyson and Matthew Farrens
  October, 2001
  PDF

• Clustered Modulo Scheduling in a VLIW Architecture with Distributed Cache
  Jesus Sanchez and Antonio Gonzalez
  October, 2001
  PDF

• The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management
  Michael Huang, Jose Renau, Seung-Moon Yoo and Josep Torrellas
  October, 2001
  PDF

• An All-Software Thread-Level Data Dependence Speculation System for Multiprocessors
  Peter Rundberg and Per Stenstrom
  October, 2001
  PDF

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last modified 06/09/02 14:34:53 -0500 by TMC